The present invention relates to a digital signal processor, and more particularly to a digital processor which can produce the data of voices, images etc., in real time and which possesses the ability to perform multiply and add operations at high speed and with high accuracy.
In appartuses for synthesizing and analyzing speech or in apparatuses in the communication field such as a MODEM (modulator-demodulator), digital filter, CODEC and echo canceler, the application of a signal processor capable of processing digitized signals in real time has been studied.
The signal processor is provided as an LSI which contains a program memory and a multiplier as well as an adder/subtractor for exclusive use for processing data at high speed. It is adapted to various usages by changing the program stored in the program memory.
In a case where the signal processor is used, e.g., as a filter for processing of voice signals, the internal operation data has a comparatively wide dynamic range of 16-28 bits due to multiply and add operations. Therefore, when the structure of the multiplier or the adder/subtractor is of the fixed point data operation type, the hardware scale of the signal processor becomes larger exponentially with an increase in the number of bits of the operation data, and the LSI implementation of the signal processor becomes difficult. This problem can be solved by changing the construction of the processor to the floating point data operation type. However, when the data processing system of a conventional general-purpose computer, which is constructed so that the multiplier and the adder/subtractor are connected by data buses and perform floating point operations independently of each other, is adopted without modification, the multiply and add operations, which are the fundamental operations of the signal processor, take a long time, and the real time operation of the signals becomes difficult for this reason.